IC Design Engineer – Analog & Power (Mid‑Senior)
Teltonika · Vilnius
Job description
About the role
Teltonika Telematics is creating a new Power Electronics Integrated Circuit design department. As an IC Design Engineer you will help launch the company’s first IC products, defining specifications, developing methodologies and delivering analog and power IC blocks.
Key responsibilities
- Design analog and power integrated circuits at transistor level, including schematics and layout.
- Develop individual IC blocks such as band‑gap references, LDOs, gate drivers, current‑sensing and protection circuits and integrate them into complete IC products.
- Perform pre‑layout and post‑layout simulations, Monte‑Carlo, PVT corner and reliability analysis.
- Review parasitic extraction results and optimise performance after layout.
- Prepare manufacturing documentation: schematics, layout reviews, design reports and simulation summaries.
- Collaborate with electronics engineers on system requirements and validation strategies.
- Work with foundries during MPW runs and mass‑production preparation, including packaging selection and silicon testing.
- Define IC‑level test plans, participate in silicon bring‑up, electrical characterisation, root‑cause analysis and debugging.
- Mentor junior IC design engineers and contribute to new circuit architectures.
Required profile
- Higher or advanced education in Electronics, Electrical Engineering or a related field.
- At least 3 years of experience in analog, mixed‑signal or power IC design.
- Strong understanding of analog and power electronics fundamentals.
- Ability to design and review IC schematics and layouts using Cadence Virtuoso or equivalent tools.
Required skills
- Analog and power IC design at transistor level.
- Cadence Virtuoso (schematic & layout) or equivalent IC design tools.
- Design of analog blocks such as amplifiers, references, comparators, drivers and regulators.
- Knowledge of power converter topologies (buck, boost, LDO, gate drivers, protection circuits).
- Pre‑layout and post‑layout simulation, parasitic extraction and corner analysis.
- Silicon debugging and electrical characterisation.
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Published 2 weeks ago
Expires 1 month from now
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Teltonika
Vilnius
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